Intel Partners with Top EDA Suppliers to Pursue Foundry Ambitions

Intel said it has partnered with the world’s leading Electronic Design Automation (EDA) software companies in building a vibrant ecosystem of support and services around its new business of foundry services.

The Santa Clara, Calif.-based company has recruited Ansys, Cadence, Siemens EDA and Synopsys to be part of its “IFS AcceleratorAs part of the program, Intel said it will give them early access to its advanced process and packaging roadmaps, process design kits (PDKs), and a range of other resources. .

The close collaboration will allow the companies to refine their chip design software for Intel’s latest process and packaging technologies so that Intel’s foundry customers can best achieve their performance, power and of surface area, while reducing their time to market.

Designing a modern chip is a complicated process that can take months or even years. It is impossible for even the most skilled engineers to design every detail by hand. Intel and other chip vendors use EDA software that helps plan, design, verify, implement, and test the chip before it is even manufactured. This way engineers can save time and focus on more important aspects of a design.

MDI 2.0

Intel has stumbled in recent years, falling behind rivals in designing and manufacturing the most advanced chips, shaking its industry dominance for the first time in a long time. Intel CEO Pat Gelsinger is looking to pull Intel out of a long period of turmoil and regain its technology leadership from TSMC. TSMC is the world’s largest foundry player with more than 500 customers, including Intel.

As part of its “IDM 2.0” strategy, Intel has pledged tens of billions of dollars to boost production capacity, including at its sprawling new $20 billion manufacturing site in Ohio. He also builds a business to manufacture chips for other companies, and even rivals, based on their plans. Intel has deals with Qualcomm and the US Department of Defense, and last year said it had discussions with more than 100 potential customers.

But to make the process of designing a chip for its factories as easy as possible, Intel needs to be part of the same foundry ecosystem as TSMC and others in the custom chip space. This means ensuring that its process and packaging technologies are compatible with popular EDA tools.

Cadence, Synopsys, and other software vendors Intel currently works with have partnered with virtually every major foundry in the industry over the years. This way, when TSMC deploys a new generation of process technology, they already have tools that can take into account the new rules for placing and routing transistors and interconnects as well as the layout of the floor plan of the final chip, among a host of other factors. .

Said Joe Sawicki, Executive Vice President of IC-EDA within the Software Division of Siemens: “Strong partnerships between foundries and leading EDA tool vendors are becoming increasingly essential for new designs to generation are developed in time.”

These relationships are all the more important as Intel introduces new transistor technologies such as its all-around gated transistors called RibbonFETs and its rear power system known as PowerVia.

IP partnerships

Intel said on Monday that it has also partnered with various companies, including Arm and SiFive, to create an extensive library of intellectual property (IP) optimized for its latest technology nodes.

“Foundry customers need access to design services, intellectual property, tools and flows to enable their next-generation products at different stages,” said Randhir Thakur, who leads the foundry business. of Intel and was previously responsible for Intel’s supply chain and manufacturing operations. He added that the new relationships would help the company “provide a seamless interface with Intel’s process and packaging technologies.”

“Intel wholeheartedly believes that innovation thrives in an open and collaborative environment,” Thakur said.

Abdul J. Gaspar